It’s a bit like the end of an era, but we saw it coming. After several years of semi-abandonment, the boss of NVIDIA has confirmed that the RTX 4000s do indeed drop the NVLink connector… and therefore the SLI mode by ricochet.
The abandonment of SLI will no doubt displease some users, but it is certainly not a surprise… it was hanging in our face. Jensen Huang, boss of NVIDIA, confirmed in an interview with the press that the new graphics cards of the firm did indeed abandon the NVLink connector and, consequently, the SLI mode. As a reminder, it allowed two identical graphics cards to be connected to each other to duplicate GPU performance.
Arbitration by NVIDIA in favor of “ something else »
As reported TechPowerUpthis removal of the NVLink connector comes from an arbitration by NVIDIA, which felt that it needed this I/O slot to ” something else “. As it stands, the firm preferred not to spend resources to wire an NVLink interface, preferring to look to other horizons: AI in particular.
We thus learn that NVIDIA engineers knowingly sacrificed the NVLink connector to recover from the surface in order to “ integrate as much AI processing as possible “. A bias visibly paying off if we stick to the performance of the new Ada Lovelace cards and the apparent efficiency of their DLSS 3.0.
PCIe Gen 5, yes… but no
Jensen Huang also justified this foreseeable abandonment by raising the issue of the PCIe Gen 5 standard… even if the new RTX 4000s do not support it. ” Because Ada is based on Gen 5, PCIe Gen 5, we now have the ability to do peer-to-peer cross-Gen 5. Which is fast enough to be a better compromise “, he explained.
Contacted by TechPowerUpthe firm confirmed and slightly clarified the words of its leader: “ Ada does not support the PCIe Gen 5 standard, but the Gen 5 power connector is included. PCIe Gen 4 provides sufficient bandwidth for current graphics uses, so we felt there was no need to implement Gen 5 for this generation of graphics cards. The large framebuffers and large L2 caches of Ada Lovelace GPUs also reduce PCIe interface utilization “.
Source : TechPowerUp
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