NASA’s Jet Propulsion Laboratory in Southern California has selected Microchip Technology of Chandler, Arizona to develop a High-Performance Spaceflight Computing (HPSC) processor that will advance all types of future space missions, from planetary exploration to Lunars and Mars, NASA said in a recent statement.
The processor architecture will allow computing power to be scaled according to mission needs, which will significantly improve the overall computing efficiency of exploration missions. The design will also make the processor more reliable, allowing spacecraft computers to perform calculations up to 100 times faster than current state-of-the-art space computers, according to NASA.
“Our current computers for spaceflight were developed almost 30 years ago,” said Wesley Powell, NASA’s senior technologist for advanced avionics. “While they have served past missions well, future NASA missions require significantly increased onboard computing capabilities and reliability. The new computer processor will provide the required advances in performance, fault tolerance and flexibility to meet the needs of these future missions. »
Three years of construction
Once the processor is developed, it may also be useful to other government agencies and commercial systems around the world with similar critical edge computing needs.
Potential applications include industrial automation, edge computing, artificial intelligence and Internet of Things gateways, NASA said.
It will take Microchip Technology three years to design and deliver the HSPC processor. During this period, the company will contribute significantly to research and development under a $50 million fixed price contract with NASA.
Microchip Technology said it was pleased to be chosen as NASA’s partner for the development of this technology. “We are jointly investing with NASA in a new reliable and transformative computing platform. It will offer full Ethernet networking, advanced AI and machine learning processing, and connectivity support, while delivering performance boost, fault tolerance, and security architecture unprecedented performance, all at low power consumption,” said Babak Samimi, vice president of the Communications Division of Microchip Technology.
Source: ZDNet.com